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Classifying high performance computing system breaches and finding common trends
Author(s)
Sanda, Zintle
Date Issued
2023
Type
Thesis
Publisher
Cape Peninsula University of Technology
Abstract
The remarkable growth of cyber connectivity and remotely delivered services has resulted in cybersecurity taking priority among other challenges. High Performance Computing (HPC) facilities are subject to the same styles of attacks, as they have an active internet connection and run the same as any other computer. Efficiently securing an HPC system that needs to be convenient and open to its users, comes with security vulnerabilities and challenges to balance the two. Traditional security solutions do not perform well with HPC systems as they can affect performance. Recent attacks have been taking advantage of security weaknesses in hardware design. It is paramount to build security within the solution during design, rather than as an add-on or afterthought.
There remains a lack of a classification of hardware security breaches, which leads to uncertainty of where to focus efforts to protect against HPC system attacks.
A literature survey was done, and it was found that major concerns of security on HPC systems are not only on the software side but also on the hardware. Security through system hardware helps protect against vulnerabilities exploited from the software level. Writing better applications to try to fix hardware-based security flaws is not actually addressing the underlying architectural flaws.
As HPC processor speeds are increasing, numerous threats have emerged and seem to be developing even more quickly because of it. Most of these vulnerabilities are related to how contemporary CPUs use cache and speculative execution. They may be able to grant unauthorised access to confidential data and can affect processor performance. Literature also shows that there are interferences affecting several conventional memories at the circuit-level, that can be hardware vulnerability aiming to gain privilege escalation, cause denial-of-service or leak sensitive data.
The trade-off between performance and computer security has been an important computer development consideration throughout the years. The literature shows that the future of security is at the hardware level. Past security approaches of “just enough security” on systems have shown various security gaps because the hardware was optimised for speed and never for security.
Several cyber countermeasures on detecting attacks have been implemented such as operating system (OS) modification and data execution prevention. The use of hardware counters built-in modern microprocessors is becoming a prominent approach and hardware that is not trustworthy is a disastrous loss of security.
It is desired during runtime that firmware security systems provide protection, detection, and restoration. This safety would preferably extend to peripheral parts and motherboards central processing unit (CPU) running firmware.
The research aims to adopt the survey research for data collection and to analyse and interpret it adopting descriptive statistics, specifically utilising convenience sampling as determined by the researcher. It will be looking into the risks involved in hardware security, such as the type of attacks that target the hardware of a system designed to operate in a HPC environment and their impact if these hardware systems are not secured.
RESULTS
It is anticipated that the study's conclusion will confirm the common trends of malware attacks that are targeting HPC systems hardware It is also expected to work towards finding the best way to create a defence mechanism for hardware designs.
CONCLUSION
In conclusion, it is expected to find that there are benefits of adapting security during design. Any programmer or engineer designer working on new systems intended to be used in an HPC environment should consider the security in design mechanism to limit the security causing impact in the system performance.
There remains a lack of a classification of hardware security breaches, which leads to uncertainty of where to focus efforts to protect against HPC system attacks.
A literature survey was done, and it was found that major concerns of security on HPC systems are not only on the software side but also on the hardware. Security through system hardware helps protect against vulnerabilities exploited from the software level. Writing better applications to try to fix hardware-based security flaws is not actually addressing the underlying architectural flaws.
As HPC processor speeds are increasing, numerous threats have emerged and seem to be developing even more quickly because of it. Most of these vulnerabilities are related to how contemporary CPUs use cache and speculative execution. They may be able to grant unauthorised access to confidential data and can affect processor performance. Literature also shows that there are interferences affecting several conventional memories at the circuit-level, that can be hardware vulnerability aiming to gain privilege escalation, cause denial-of-service or leak sensitive data.
The trade-off between performance and computer security has been an important computer development consideration throughout the years. The literature shows that the future of security is at the hardware level. Past security approaches of “just enough security” on systems have shown various security gaps because the hardware was optimised for speed and never for security.
Several cyber countermeasures on detecting attacks have been implemented such as operating system (OS) modification and data execution prevention. The use of hardware counters built-in modern microprocessors is becoming a prominent approach and hardware that is not trustworthy is a disastrous loss of security.
It is desired during runtime that firmware security systems provide protection, detection, and restoration. This safety would preferably extend to peripheral parts and motherboards central processing unit (CPU) running firmware.
The research aims to adopt the survey research for data collection and to analyse and interpret it adopting descriptive statistics, specifically utilising convenience sampling as determined by the researcher. It will be looking into the risks involved in hardware security, such as the type of attacks that target the hardware of a system designed to operate in a HPC environment and their impact if these hardware systems are not secured.
RESULTS
It is anticipated that the study's conclusion will confirm the common trends of malware attacks that are targeting HPC systems hardware It is also expected to work towards finding the best way to create a defence mechanism for hardware designs.
CONCLUSION
In conclusion, it is expected to find that there are benefits of adapting security during design. Any programmer or engineer designer working on new systems intended to be used in an HPC environment should consider the security in design mechanism to limit the security causing impact in the system performance.
Additional information
Thesis (MTech (Information Technology))--Cape Peninsula University of Technology, 2023
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